Hui Li, Ping Li, Yiwen Wang. An efficient hardware accelerator architecture for implementing fast IMDCT computation, Signal Process. 2010,90(8):2540-2545(SCI检索号：000267989700001; EI检索号：20101712884465)
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上一条：Hui Li, Ping Li, Yiwen Wang, et al. A new decomposition algorithm of DCT-IV/DST-IV for realizing fast IMDCT computation. IEEE Signal Processing Letters, 2009, 16(9): 735-738 (SCI检索号：000267989700001; EI检索号：20092912196465)
下一条：Hui Li, Yiwen Wang, Ping Li. A Time-frequency Hybrid Downmixing Method for AC-3 Decoding. IEEE Signal Processing Letters, 2014, 21(8): 933-936 (SCI收录)