王坚
-
教授
博士生导师
- 性别：男
- 毕业院校：电子科技大学
- 学历：博士研究生毕业
- 学位：工学博士学位
- 在职信息：在职人员
- 所在单位：信息与通信工程学院
- 办公地点：科研楼B255
- 电子邮箱：954f626256676e9507f4f362fdf5df086698cdb3c40b3e92c14fc3cdf6aa9151cf09463e5039bc7e3cd6f9770900b3a20ad60f0370cba9ff5e3f323e1e5bfabbee773375b91863b2d5105c22b3da5cc2620a60ae6f101497cafe8cee0b8909752eec51813914e21305ccc59626ac47f17070cb56400e6164fc0549e7dc24d804
访问量：
-
[1]
T. Yan,
J. Wang*,
and Z-H. Cheng,
Hardware Trojan Detection for Incomplete Gate-Level Reverse Netlist (In press), IEEE Trans. on Dependable and Secure Computing, Sep 2025.
-
[2]
S. Tang,
J. Wang*,
Z. Chen,
and S. Guo,
A Covert and Efficient Attack on FPGA Cloud Based on Adaptive RON, IEEE Trans. on Dependable and Secure Computing, vol. 22, no. 5, pp. 4641-4653, Sep 2025.
-
[3]
W. Chen,
Z. Bai,
G. Pan,
and J. Wang,
A fast modularity hardware Trojan detection technique for large scale gate-level netlists, Computers and Security, vol. 148, Sep 2024.
-
[4]
G. Pan,
H. Li,
and J. Wang,
A fast hardware Trojan detection method with parallel clustering for large-scale gate-level netlists, Computers and Security, vol. 157, pp. 104570, Jun 2025.
-
[5]
L. Ren,
X. Zhang,
and J. Wang*,
Low complexity decompression method for FPGA bitstreams, International Journal of Information Security, vol. 24, no. 1, pp. 65, Jan 2025.
-
[6]
J. Wang,
Z. Chen,
S. Guo,
Y. Li,
and Z. Lu,
Optimal Sprinting pattern for thermal-constrained CMPs, IEEE Trans. On Emerging Topic in Computing, vol. 9, no. 1, pp. 484-495, Mar 2021.
-
[7]
S. Guo,
J. Wang*,
Z. Chen,
Y. Li,
and Z. Lu,
Securing IoT Space via Hardware Trojan Detection, IEEE Internet of Things Journal, vol. 7, no. 11, pp. 11115-11122, Nov 2020.
-
[8]
S. Guo,
J. Wang*,
Z. Chen,
Z. Lu,
J. Guo,
and L. Yang,
Security-aware Task Mapping Reducing Thermal Side Channel Leakage in CMPs, IEEE Trans. on Industrial Informatics, vol. 15, no. 10, pp. 5435-5443, Oct 2019.
-
[9]
J. Wang,
S. Guo,
Z. Chen,
Y. Li,
and Z. Lu,
A New Parallel CODEC Technique for CDMA NoCs, IEEE Trans. on Industrial Electronics, vol. 65, no. 8, pp. 6527-6537, Sep 2011.
-
[10]
J. Wang,
Z. Chen,
J. Guo,
Y. Li,
and Z. Lu,
ACO-based Thermal-Aware Thread-to-Core Mapping for Dark Silicon Constrained CMPs, IEEE Trans. on Electron Devices, vol. 64, no. 3, pp. 930-937, Mar 2017.
-
[11]
J. Wang,
X. Huang,
S. Tang,
G. M. Shi,
and J. Guo,
Blood Triglyceride Monitoring with Smartphone as Electrochemical Analyzer for Cardiovascular Disease Prevention, IEEE Journal of Biomedical and Health Informatics, vol. 23, no. 1, pp. 66-71, Jan 2019.
-
[12]
J. Wang,
Z. Lu,
Y. Li,
Y. Fu,
and J. Guo,
A High-Level Thermal Model-Based Task Mapping for CMPs in Dark Silicon Era, IEEE Trans. on Electron Devices, vol. 63, no. 9, pp. 3406-3412, Aug 2016.
-
[13]
J. Wang,
Z. Lu,
and Y. Li,
A New CDMA Encoding/Decoding Method for on Chip Communication Network, IEEE Trans. on VLSI systems, vol. 24, no. 4, pp. 1607-1611, Apr 2016.
-
[14]
J. Wang,
Y. Li,
and J. Liao,
A System-level Bandwidth Design Method for Wormhole Network-on-Chip, International Journal of Electronics, vol. 103, no. 11, pp. 1928-1940, Feb 2016.
-
[15]
J. Wang
and Y. Li,
A Novel Model of Computation for Software Synthesis Based on Data Frame Driving, IETE Technical Review, vol. 32, no. 1, pp. 70-78, Feb 2015.
-
[16]
J. Wang,
Y. Li,
and H. Li,
An Efficient Link Bandwidth Design Method for Application Specific Network-on-Chip, IETE Technical Review, vol. 30, no. 2, pp. 102-107, Sep 2015.
-
[17]
J. Wang,
Y. Li,
and H. Li,
A Performance Analytical Strategy for Network-on-Chip Router with Input Buffer Architecture, Advances in Electrical and Computer Engineering, vol. 12, no. 4, pp. 19-24, Nov 2012.
-
[18]
J. Wang,
Y. Li,
and Q. Peng,
System-Level Buffer Allocation for Application Specific Network-on-Chip with Wormhole Routing, IETE Technical Review,
-
[19]
J. Wang,
Y. Li,
and Q. Peng,
A Novel Analytical Model for Network-on-Chip using Semi-Markov Process, Advances in Electrical and Computer Engineering, vol. 11, no. 1, pp. 111-120, Feb 2011.
-
[20]
J. Wang,
Y. Li,
and C. Wu,
An analytical model for network-on-chip with finite input buffer, Frontiers of computer science, vol. 5, no. 1, pp. 126-134, Mar 2011.
